Design Management Requirements for Hardware Description Languages

This paper discusses the relationships between HDL's and design management services commonly found in EDA environments and frameworks. By using VHDL as a case study, it is demonstrated that HDL's are not neutral with regard to these services. The paper shows that the exibility in using a language together with the widest possible range of design management mechanisms should be a major language requirement. The paper indicates VHDL extensions and modi cations that follow in this direction.